Hackaday

Give Your RPi A Cool FPGA Hat

Need additional, custom IO for your Raspberry Pi? Adding an FPGA is a logical way to expand your IO, and allow for high speed digital interfaces. [Eric Brombaugh]’s Icehat adds a Lattice iCE5LP4K-SG48 ...
Forbes

Microsoft: FPGA Wins Versus Google TPUs For AI

At the recent Hot Chips conference, three of the world’s largest datacenter companies detailed projects that exploit Field Programmable Gate Arrays (FPGAs) as accelerators for performance-hungry ...
Datacenter Dynamics

Intel relaunches Altera as standalone FPGA business

Intel has launched a standalone FPGA (field-programmable gate array) business, branding it Altera - after the company it acquired in 2015. The company will sell reconfigurable chips for systems across ...
Hackaday

FPGA To Ethernet Direct

When [iliasam] needed an Ethernet connection, he decided to see how much of the network interface he could put in the FPGA logic. Turns out that for 10 Base-T, he managed to get quite a bit inside the ...
Forbes

Intel’s Chiplet Strategy Accelerates FPGA Development

Although chiplets have recently broken into the semiconductor limelight in a big way, Intel’s Programmable Solutions Group (PSG) has relied on chiplet technology for its Field Programmable Gate Arrays ...
MMORPG.com

ModRetro Provides A Deep Dive And Launch Update For Its Upcoming FPGA Nintendo 64, The M64

ModRetro's been pretty quiet about its FPGA-powered N64 recreation console, the M64, but late last week eager fans got the ...

Silicom Awarded $3M/Yr FPGA Smart NIC Design Win by European Secure Communications Leader

Silicom Ltd. (NASDAQ: SILC), a leading provider of networking and data infrastructure solutions, today announced that it has secured a Design Win with a European provider of advanced encryption and ...
VentureBeat

FPGA chips are coming on fast in the race to accelerate AI

AI is hungry, hyperscale AI ravenous. Both can devour processing, electricity, algorithms, and programming schedules. As AI models rapidly get larger and more complex (an estimated 10x a year), a ...
EDN

Resets in FPGA & ASIC control and data paths

Reset is an important mechanism to bring a digital system into a known state. The need for reset is governed by the system design and application, and various data and control paths are designed to ...
EDN

How to design FPGA-based advanced PCI Express endpoint solutions

Currently dominating the desktop PC motherboard and graphics markets, the PCI Express protocol is poised to supplant PCI and PCI-X interface as the dominant high-bandwidth interconnect for the server, ...
Semiconductor Engineering

FPGA Design Tradeoffs Getting Tougher

FPGAs are getting larger, more complex, and significantly harder to verify and debug. In the past, FPGAs were considered a relatively quick and simple way to get to market before committing to the ...